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Five Key Workflows that Deliver 3D IC Packaging Success
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"Five Key Workflows that Deliver 3D IC Packaging Success"

Several factors are converging and driving the chiplet design revolution. This paper explores these factors and outlines five key workflows that address and manage the associated, new challenges.

These five workflows span several interlinked domain areas:

  • Architecture definition
  • Design activities (including planning, prototyping, system technology co-optimization, and detailed physical implementation of the substrates)
  • Multi-physics analysis
  • Device-level test
  • Manufacturing

This paper recommends workflow adoption focus areas that provide immediate heterogeneous integration capability benefits while establishing a managed methodology adoption and migration process that minimizes disruption, risk, and cost. This will bring heterogeneous integration-based chiplet design within reach of the mainstream instead of being accessible only to the mega iDMs and fabless semiconductor companies.


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